Revised Input Stage for MK III Phono Preamplifier

Since a couple of months the MK III phono stage is playing in my system and I am really pleased with its sonic performance. However, after several discussions on the internet I decided to focus a little more on enhancing the noise performance of the input stage and after all a German proverb says: “Der Weg ist das Ziel” (may be translated as “the journey is the goal”).

Basically a simple asymmetrical single input phono stage shows better noise performance compared to a differential input design. A differential design splits the input voltages equally between the two input transistors. Hence each input transistors receives 50% of the input voltage at its gate. On the other hand the noise reduction equals to the square root of the number of paralleled transistors which results in a noise reduction of only 1.41 (sqrt of 2) in a symmetrical input stage comprising two input transistors.

This shortage can be overcome by paralleling more input transistors (Fig. 1, 2). The revised input stage uses six carefully selected jFETs (click here for selection process). A number of six was chosen as an acceptable compromise between noise performance, power dissipation and impedance. For the drain resistors are part of the RIAA network, values below 2kOhm will result in a very low impedance RIAA network with inappropriately high values for the RIAA capacitors.

The 2SK369 transistors as current source of the previous input stages were replaced by BF246 jFETs. These transistors were chosen for their high drain-source saturation current I_Dss > 30mA (see data sheet).

With idle currents of 2 x 15mA (5mA for each input jFET) an eye must be kept on power dissipation of the cascoding transistors and the current sources. Voltage loss across the drain resistors equals 2000Ohm x 0,015A = 30V. With fully charged accumulators this leaves 12V across the cascoding BC550C, resulting in a power dissipation of 12V x 0.015A = 0.18W which is still well below the specification of a maximum power dissipation of 0.5W (see data sheet).

For similar reasons of power dissipation two current sources were paralleled. Here the crucial transistor is the BF246. Its power dissipation equals 14.6V x 0.015A = 0.22W which is more than 50% of the maximum rating of 0.4W (see data sheet). Hence the jFETs are provided with small SMD heat sinks (123K/W) glued on the plastic package (Fig. 3).

Of course multiple input jFETs will cause increasing of input capacitance that will degrade the bandwidth for high-impedance sources. But with the low impedance of a MC cartrige input capacitance is a problem of theoretical relevance.

The gain of the revised input stage is 240 (47.6db) at the differential output due to the high transcon- ductance of 120mA/V of the three paralleled input jFETs. Bandwidth ranges from zero to 750kHz (-3db) (see gain vs. frequency plot). Clipping at the drain resistors occurs at a voltage swing of 28V_pp. This equals to more than 200mV_pp at the input, which is far beyond the output voltage of any MC cartrige available on this planet. However, to keep distortion low in the non feedback design, it is beneficial to use only a small fraction of the voltage characteristics. If we assume a voltage swing of 2mV_pp from a MC cartrige, only 1% of the headamp’s maximum voltage swing is used in normal operation.

RIAA equalization

RIAA equalization was adapted to the 2.0kOhm drain resistors. Because of high capacitances needed, Mundorf Mcaps ZN with paralleled KP capacitors were used (see schematic). The capacitors were matched to less than 0.1% left / right channel. It needed some tweaking to get close to the theoretical RIAA curve.

The RIAA response is shown in the RIAA plot. Within the midrange of the audio band between 200Hz and 5000Hz the RIAA accuracy is better than +/-0.1db (see RIAA error plot). The highest deviation from the theoretical RIAA was 0.26db, measured at 50Hz. The roll off below 20Hz prevents saturation of the output transformers at high signal levels. At high frequencies the fourth time constant elevates the RIAA response to 0.37dB @ 20kHz and 1.37db @ 50kHz respectively. Rt (set to 68k in the schematic) allows a fine tuning of the RIAA response.

Output stage

The output stage received two minor changes. The compensating resistors for impedance matching at the + and - inputs of the OPA627 were omitted due to the extremely low impedance of the RIAA network.

Furthermore, the gain of the output stage was reduced from 500 (54db) to 250 (48db) by replacing the 10k resistors in the feedback loops by 5k resistors. During the first listening tests it appeared that the output stage was driven into saturation sometimes due to the higher gain of the revised input stage. With a total gain of 250, the gain of the OPA627 is reduced to 250 / 37 (gain of the OPA603) = 6.75 which provides an even lower offset voltage for the output transformers.

The output stage is described in detail on a separate page (click here for that page).

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