Selection of input jFETs for phono stage

Unfortunately many of the characteristics of jFETs show much greater process spread than corresponding characteristics of bipolar transistors. One solution to the problem are dual jFETs, especially in differential designs. In own measurements, the gate-source voltages U_GS of both jFETS of a dual 2SK389 differed less than 2% (see table 1)*. However, between different 2SK389 there still is a large spread of U_GS at a given drain current. Hence matching of the transistors is unavoidable (see paragraph on transistor matching below).

For a jFET moving coil head amplifier, low noise and high transconductance are mandatory. A BF246A has a transconductance 8mA/V (see data sheet) the dual 2SK 389 has 20mA/V which is good (see data sheet), the 2SK369 has a transconductance of 40mA/V and exceptional noise performance (see data sheet).

*Determination of U_GS is described further down on this page.

Tab.1: Gate-source voltage at 5mA drain current, measured in five different dual jFETs 2SK389.

Fig.1: Calculated dependence of gain on supply voltage and quiescent current under the assumption of a given voltage of 15V across the cascode. The higher the voltage and the lower source-drain current, the higher the gain.

Fig.2: Dependence of transconductance on quiescent current (taken from 2Sk369 data sheet). If the quiescent current is doubled from 5 to 10mA, the transconductance rises from 40 to 52mA/V.

Fig.3: Dependence of input noise voltage and quiescent current at U_DS = 10V (data sheet).

Fig.4: Dependence of noise figure and quiescent current at U_DS = 10V (data sheet).

Voltage across the cascode

In a cascode the voltage across the lower transistor is constant, independent from the input signal. Hence to ensure enough headroom for the load resistor and the cascoding transistor, the drain-source voltageof the 2SK369 jFETs should not be higher than needed. Besides, at drain-source voltages of 16V and 5mA quiescent current, the gate leakage current is around 10nA according to the 2SK369 data sheets  (fig. 5). At 8V the leakage current reduces by the factor of 1000 to give 10pA (though this is not a major problem due to the low input impedance of the cartrige).

So it is interesting to determine the lower limit of the drain-source voltage.

Determining the lower limit of U_DS

To evaluate the lower limits of the drain-source voltage of the input jFET a potentiometer was added to the battery connected to the base of the cascoding transistors. Then the MK III preamp was wired into the audio system and the battery voltage lowered slowly starting at 9V (fig. 6, fig. 7, blue line).

Fig.5: Dependence of gate leakage current drain-source voltage.

Fig.6: Experimental setup to determine the lower limits of the drain-source voltage concerning the sonic performance of the input stage.

Fig.7: Margins in drain-source voltage with noticeable changes of sonic performance of the input stage. Blue to green: no change, green to red: degradation in imaging, below red: degradation in CMR. (Please notice, that 0.7V are subtracted from the voltages measured at the potentiometer due to the loss across the pn-juction of the cascoding transistor)

Matching of input FETs

The schematic for the setup of matching the input FETs is shown in figure 8. Three FETs can be matched simultaneously. The BF246s are current sources (actually current sinks) for the FETs to be matched.

The BF246 were chosen for their high drain-source saturation current I_Dss > 30mA (see data sheet). So there is no risk of saturation and relatively high values of source resistors for self-biasing may be used. That improves the stability of the current source.

Fig.8: Circuitry to match jFETs.

With the source resistors the constant currents for matching are set. For a current of 5mA the source resistor value measured is 427Ohm. However, to allow differing currents, the resistance may be trimmed and fine adjustment of the currents is necessary anyway. The 39Ohm resistors are for current measurement. They deliver a voltage drop of 195mV at 5mA, easy to measure with the 200mV range of a simple digital meter. The circuitry is powered by two 9V NiMH accumulators. So voltage and current and hence wattage dissipation during matching is almost identical to the parameters in the phono stage.

For matching a constant room temperature around 20°C is mandatory. The FETs were inserted into the sockets, the currents checked. Then the FETs were allowed to set to thermal equilibrium for 15 minutes. Afterwards the gate-source voltages were measured.

Fig.9: Setup for matching jFETs.

Fig.10: Distribution of gate-source voltages across the 2SK389 (n=5) and 2Sk269 (n=50) at constant drain currents of 5mA.

For the experiments two resistors were glued on the input jFETs and fed with DC from a lead gel accumulator until they reached around 50°C in a first experiment and 80°C in a second experiment. Listening tests were done by two independent persons. The differences in sonics at different temperatures (room temperature, 50°C, 80°C) were subtle but audible: The hotter the jFETs got, the worse the sonic performance.

Conclusion: For best performance the input jFETs should stay cool.

Fig.11: 560Ohm resistors glued on the input jFETs.